? semiconductor components industries, llc, 2014 september, 2014 ? rev. 6 1 publication order number: mc74vhct02a/d mc74vhct02a quad 2-input nor gate the mc74vhct02a is an advanced high speed cmos 2?input nor gate fabricated with silicon gate cmos technology. it achieves high speed operation similar to equivalent bipolar schottky ttl while maintaining cmos low power dissipation. the vhct inputs are compatible with ttl levels. this device can be used as a level converter for interfacing 3.3 v to 5.0 v, because it has full 5 v cmos level output swings. the vhct02a input structures provide protection when voltages between 0 v and 5.5 v are applied, regardless of the supply voltage. the output structures also provide protection when v cc = 0 v. these input and output structures help prevent device destruction caused by supply voltage ? input/output voltage mismatch, battery backup, hot insertion, etc. the internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. the inputs tolerate voltages up to 7 v, allowing the interface of 5 v systems to 3 v systems. features ? high speed: t pd = 3.6 ns (typ) at v cc = 5 v ? low power dissipation: i cc = 2 a (max) at t a = 25 c ? ttl?compatible inputs: v il = 0.8 v; v ih = 2.0 v ? power down protection provided on inputs ? balanced propagation delays ? designed for 2 v to 5.5 v operating range ? low noise: v olp = 0.8 v (max) ? pin and function compatible with other standard logic families ? latchup performance exceeds 300 ma ? esd performance: hbm > 2000 v; machine model > 200 v ? chip complexity: 40 fets or 10 equivalent gates ? these devices are pb?free and are rohs compliant marking diagrams tssop?14 dt suffix case 948g 1 soic?14 d suffix case 751a 1 http://onsemi.com a = assembly location wl, l = wafer lot y = year ww, w = work week g or = pb?free package vhct02ag awlyww 1 14 vhct 02a alyw 1 14 (note: microdot may be in either location) device package shipping ? ordering information MC74VHCT02ADR2G soic?14 (pb?free) tssop14 (pb?free) ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. mc74vhct02adtr2g 2500 / t ape & reel 2500 / t ape & reel
mc74vhct02a http://onsemi.com 2 figure 1. logic diagram 1 y1 2 a1 3 b1 y4 y = a + b 4 y2 5 a2 6 b2 10 y3 8 a3 9 b3 13 11 a4 12 b4 function table a l l h h inputs output b l h l h y h l l l figure 2. pin assignment 11 12 13 14 8 9 10 5 4 3 2 1 7 6 y3 a4 b4 y4 v cc a3 b3 y2 b1 a1 y1 gnd b2 a2
mc74vhct02a http://onsemi.com 3 ??????????????????????? ??????????????????????? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? v cc ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 20 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 25 ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? 50 ??? ??? ???? ???? ???? ?????????????? ?????????????? ?????????????? ????? ????? ????? ??? ??? ??? ???? ???? ?????????????? ?????????????? ????? ????? ??? ??? c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. ?derating ? soic package: ? 7 mw/ c from 65 to 125 c tssop package: ? 6.1 mw/ c from 65 to 125 c recommended operating conditions ???? ???? ??????????????? ??????????????? ?? ?? ?? ?? ??? ??? ???? ???? v cc ??????????????? ??????????????? ?? ?? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ?? ?? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ?? ?? ?? ?? ??? ??? ???? ???? ??????????????? ??????????????? ?? ?? ?? ?? ??? ??? c ???? ???? ??????????????? ??????????????? 0.5v ?? ?? ?? ?? ??? ??? ????????????????????????????????? ????????????????????????????????? dc electrical characteristics ???? ???? ???? ???????? ???????? ???????? ?????? ?????? ?????? ??? ??? ??? ??????? ??????? c ????? ????? 85 c ????? ????? 125 c ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? v ih ???????? ???????? ???????? ?????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ?????? ?????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ?????? ?????? a ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ?????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? ???? ???????? ???????? ???????? ???????? ???????? ?????? ?????? ?????? a ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ?? ?????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???????? ???????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? 0.1 ??? ??? ??? ??? 1.0 ??? ??? ??? ??? 1.0 ?? ?? a ???? ???? ???? ???????? ???????? ???????? ?????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? a ???? ???? ???????? ???????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ???? ???? ???????? ???????? ?????? ?????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? a this device contains protection circuitry to guard against damage due to high static voltages or electric fields. however, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high?impedance cir- cuit. for proper operation, v in and v out should be constrained to the range gnd (v in or v out ) v cc . unused inputs must always be tied to an appropriate logic voltage level (e.g., either gnd or v cc ). unused outputs must be left open.
mc74vhct02a http://onsemi.com 4 ????????????????????????????????? ????????????????????????????????? (input t r = t f = 3.0ns) ???? ???? ???? symbo l ???????? ???????? ???????? ???????? ???????? ???????? ??????? ??????? c ????? ????? 85 c ????? ????? 125 c ?? ?? ?? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???? ???? t plh , t phl ???????? ???????? ???????? ???????? ???????? ???????? ???????? 0.3v c l = 15pf c l = 50pf ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? ?? ?? ???????? ???????? 0.5v c l = 15pf c l = 50pf ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ???? ???? ???????? ???????? ???????? ???????? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ??? ?? ?? typical @ 25 c, v cc = 5.0v pf 20 1. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption with out load. average operating current can be obtained by the equation: i cc(opr ) = c pd v cc f in + i cc / 4 (per gate). c pd is used to determine the no?load dynamic power consumption; p d = c pd v cc 2 f in + i cc v cc . noise characteristics (input t r = t f = 3.0ns, c l = 50pf, v cc = 5.0v) symbol characteristic t a = 25 c unit typ max v olp quiet output maximum dynamic v ol 0.3 0.8 v v olv quiet output minimum dynamic v ol ? 0.3 ? 0.8 v v ihd minimum high level dynamic input voltage 3.5 v v ild maximum low level dynamic input voltage 1.5 v figure 3. switching waveforms 3.0v gnd 1.5v 1.5v a or b y t phl t plh *includes all probe and jig capacitance figure 4. test circuit c l * test point device under test output v oh v ol
mc74vhct02a http://onsemi.com 5 package dimensions soic?14 case 751a?03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc74vhct02a http://onsemi.com 6 package dimensions tssop?14 dt suffix case 948g issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ?u? seating plane 0.10 (0.004) ?t? ??? ??? ??? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ?v? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 mc74vhct02a/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.
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